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low cost microprocessor supervisory circuits adm705/adm706/adm707/adm708 rev. g information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2008 analog devices, inc. all rights reserved. features guaranteed reset valid with v cc = 1 v 190 a quiescent current precision supply voltage monitor 4.65 v (adm705/adm707) 4.40 v (adm706/adm708) 200 ms reset pulse width debounced ttl/cmos manual reset input ( mr ) independent watchdog timer (adm705/adm706) 1.60 sec timeout (adm705/adm706) active high reset output (adm707/adm708) voltage monitor for power-fail or low battery warning superior upgrade for max705 to max708 applications microprocessor systems computers controllers intelligent instruments critical microprocessor supply monitoring functional block diagrams watchdog transition detector watchdog input (wdi) power-fail input (pfi) power-fail output (pfo) watchdog output (wdo) reset * voltage reference = 4.65v (adm705), 4.40v (adm706) adm705/ adm706 reset and watchdog timebase reset generator mr v cc 250 a v cc watchdog timer 4.65v* 1.25v 00088-001 figure 1. adm705/adm706 1.25v power-fail input (pfi) reset * voltage reference = 4.65v (adm707), 4.40v (adm708) adm707/ adm708 reset generator mr v cc 250 a v cc reset 00088-002 4.65v* power-fail output (pfo) figure 2. adm707/adm708 general description the adm705/adm706/adm707/adm708 microprocessor supervisory circuits are suitable for monitoring 5 v power supplies/batteries and can also monitor microprocessor activity. the adm705/adm706 provide power-supply monitoring circuitry that generate a reset output during power-up, power- down, and brownout conditions. the reset output remains operational with v cc as low as 1 v. independent watchdog monitoring circuitry is also provided. this is activated if the watchdog input has not been toggled within 1.60 seconds. in addition, there is a 1.25 v threshold detector to warn of power-failures, to detect low battery conditions, or to monitor an additional power supply. an active low, debounced manual reset input ( mr ) is also included. the adm705 and adm706 are identical except for the reset threshold monitor levels, which are 4.65 v and 4.40 v, respectively. the adm707 and adm708 provide a similar functionality to the adm705 and adm706 and only differ in that a watchdog timer function is not available. instead, an active high reset output (reset) is available as well as the active low reset output ( reset ). the adm707 and adm708 are identical except for the reset threshold monitor levels, which are 4.65 v and 4.40 v, respectively. all parts are available in narrow 8-lead pdip and 8-lead soic packages.
adm705/adm706/adm707/adm708 rev. g | page 2 of 12 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagrams ............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 4 esd caution .................................................................................. 4 pin configurations and function descriptions ........................... 5 typical performance characteristics ............................................. 6 circuit information .......................................................................... 8 power-fail reset output ...........................................................8 manual reset ..................................................................................8 watchdog timer (adm705/adm706) .....................................8 power-fail comparator ................................................................8 va l i d reset below 1 v v cc ........................................................9 applications information .............................................................. 10 monitoring additional supply levels ...................................... 10 microprocessor with bidirectional reset ............................. 10 outline dimensions ....................................................................... 11 ordering guide .......................................................................... 12 revision history 3/08rev. f to rev. g changes to applications .................................................................. 1 changes to table 2 ............................................................................ 4 changes to figure 9 .......................................................................... 6 changes to figure 10, figure 11, and figure 12 ........................... 7 changes to figure 14 ........................................................................ 8 changes to ordering guide .......................................................... 12 2/07rev. e to rev. f updated format .................................................................. universal changes to watchdog timeout period .......................................... 3 replaced pin configurations and function descriptions section ................................................................................................ 5 7/06rev. d to rev. e added rm-8 (msop) package ......................................... universal changes to table 2 ............................................................................ 4 updated outline dimensions ....................................................... 12 changes to ordering guide .......................................................... 12 11/05rev. c to rev. d updated format .................................................................. universal deleted figure 2 ................................................................................. 4 updated outline dimensions ....................................................... 11 changes to ordering guide .......................................................... 12 8/02rev. b to rev. c removed rm-8 (soic) package .................................... universal updated n-8 and r-8 packages ....................................................... 8
adm705/adm706/adm707/adm708 rev. g | page 3 of 12 specifications v cc = 4.75 v to 5.5 v, t a = t min to t max , unless otherwise noted. table 1. parameter min typ max unit test conditions/comments power supply v cc operating voltage range 1.0 5.5 v supply current 190 250 a logic output reset threshold 4.5 4.65 4.75 v adm705/adm707 4.25 4.40 4.50 v adm706/adm708 reset threshold hysteresis 40 mv reset pulse width 160 200 280 ms reset output voltage v cc ? 1.5 v i source = 800 a 0.4 v i sink = 3.2 ma 0.3 v v cc = 1 v, i sink = 50 a 0.3 v v cc = 1.2 v, i sink = 100 a reset output voltage v cc ? 1.5 v adm707/adm708, i source = 800 a 0.4 v adm707/adm708, i sink = 1.2 ma watchdog timeout period (t wd ) 1.00 1.60 2.25 sec v il = 0.4 v, v ih = v cc 0.8, wdi = v cc wdi pulse width (t wp ) 50 ns watchdog input wdi input threshold logic low 0.8 v logic high 3.5 v wdi input current 50 150 a wdi = 0 v ?150 ?50 a wdi = 0 v wdo output voltage v cc ? 1.5 v i source = 800 a 0.4 v i sink = 1.2 ma manual reset input mr pull-up current 100 250 600 a mr = 0 v mr pulse width 150 ns mr input threshold logic low 0.8 v logic high 2.0 v mr to reset output delay 250 ns power-fail input pfi input threshold 1.2 1.25 1.3 v pfi input current ?25 +0.01 +25 na pfo output voltage v cc ? 1.5 v i source = 800 a 0.4 v i sink = 3.2 ma
adm705/adm706/adm707/adm708 rev. g | page 4 of 12 absolute maximum ratings t a = 25c, unless otherwise noted. table 2. parameter rating v cc ?0.3 v to +6 v all other inputs ?0.3 v to v cc + 0.3 v input current v cc 20 ma gnd 20 ma digital output current 20 ma power dissipation, n-8 pdip 727 mw ja thermal impedance 135c/w power dissipation, r-8 soic 470 mw ja thermal impedance 110c/w power dissipation, rm-8 msop 900 mw ja thermal impedance 206c/w operating temperature range industrial (version a) ?40c to +85c lead temperature (soldering, 10 sec) 300c vapor phase (60 sec) 215c infrared (15 sec) 220c storage temperature range ?65c to +150c esd rating >4.5 kv stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
adm705/adm706/adm707/adm708 rev. g | page 5 of 12 pin configurations and function descriptions reset adm705/ adm706 top view (not to scale) 1 2 3 4 5 8 7 6 00088-003 mr pfo wdi wdo v cc gnd pfi figure 3. adm705/adm706 pdip/soic pin configuration reset adm707/ adm708 top view (not to scale) 1 2 3 4 5 8 7 6 00088-004 mr pfo nc v cc gnd pfi nc = no connect reset figure 4. adm707/adm708 pdip/soic pin configuration pfo adm708 top view (not to scale) 1 2 3 4 5 8 7 6 00088-005 reset gnd pfi nc reset mr v cc nc = no connect figure 5. adm708 msop pin configuration table 3. pin function descriptions mnemonic pin number description adm705/ adm706 (pdip, soic) adm707/ adm708 (pdip, soic) adm708 (msop) mr 1 1 3 manual reset input. when this pin is taken below 0.8 v, a reset is generated. mr can be driven from ttl, cmos logic, or from a manual reset switch as it is internally debounced. an internal 250 a pull-up current holds the input high when floating. v cc 2 2 4 5 v power supply input. gnd 3 3 5 0 v ground reference for all signals. pfi 4 4 6 power-fail input. pfi is the noninverti ng input to the power-fail comparator. when pfi is less than 1.25 v, pfo goes low. if unused, pfi should be connected to gnd or v cc . pfo 5 5 7 power-fail output. pfo is the output from the powe r-fail comparator. it goes low when pfi is less than 1.25 v. wdi 6 n/a n/a watchdog input. wdi is a three-level inp ut. if wdi remains either high or low for longer than the watchdog timeout period, the watchdog output (wdo ) goes low. the timer resets with each tran sition at the wdi input. either a high- to-low or a low-to-high transition clears the counter. the internal timer is also cleared whenever reset is asserted. the watchdog timer is disabled when wdi is left floating or connected to a three-state buffer. nc n/a 6 8 no connect. reset 7 7 1 logic output. reset goes low for 200 ms when triggered. it can be trig- gered either by v cc being below the reset threshold or by a low signal on the manual reset input (mr ). reset remains low whenever v cc is below the reset threshold (4.65 v in adm705/adm707, 4.40 v in adm706/adm708). it remains low for 200 ms after v cc goes above the reset threshold or mr goes from low to high. a watchdog timeout does not trigger reset unless wdo is connected to mr . wdo 8 n/a n/a watchdog output. wdo remains low until the watchdog timer is cleared. wdo also goes low during low line conditions. whenever v cc is below the reset threshold, wdo goes low if the internal wdo remains low. as soon as v cc goes above the reset threshold, wdo goes high. reset n/a 8 2 logic output. reset is an active high output suitable for systems that use active high reset logic. it is the inverse of reset .
adm705/adm706/adm707/adm708 rev. g | page 6 of 12 typical performance characteristics 10 0% 100 90 1v 4.50v a1 1v reset 00088-012 500msh o v cc figure 6. reset output voltage vs. supply voltage 100 500msh o 1v 4.50v a1 1v v cc reset 00088-013 90 10 0% figure 7. adm707/adm708 reset output voltage vs. supply voltage 1.2v 0v 5v 1.3v pfi pfo v cc = 5v t a = 25c 00088-014 500ns/div figure 8. pfi comparator assertion response time 1.3v 4.4v 0v 1.2v pfo pfi 00088-015 500ns/div v cc = 5v t a = 25c figure 9. pfi comparator deassertion response time
adm705/adm706/adm707/adm708 rev. g | page 7 of 12 5v 0v 5v 0v 00088-016 100ns/div reset reset v cc = v rt t a = 25c figure 10. reset , reset assertion 5v 0v 5v 0v reset 00088-017 100ns/div reset v cc = v rt t a = 25c figure 11. reset , reset deassertion 4v v cc 5v 0v 5v reset t a = 25c 2 s/div 00088-018 figure 12. adm705/adm707 reset response time
adm705/adm706/adm707/adm708 rev. g | page 8 of 12 circuit information power-fail reset output reset is an active low output that provides a reset signal to the microprocessor whenever the v cc input is below the reset threshold. an internal timer holds reset low for 200 ms after the voltage on v cc rises above the threshold. this functions as a power-on reset signal for the microprocessor. it allows time for both the power supply and the microprocessor to stabilize after power-up. the reset output is guaranteed to remain valid (low) with v cc as low as 1 v. this ensures that the micropro- cessor is held in a stable shutdown condition as the power supply voltage ramps up. in addition to reset , an active high reset output is also available on the adm707/adm708. this is the complement of reset and is useful for processors requiring an active high reset signal. manual reset the manual reset input ( mr ) allows other reset sources, such as a manual reset switch, to generate a processor reset. the input is effectively debounced by the timeout period (200 ms typical). the mr input is ttl-/cmos-compatible, so it can also be driven by any logic reset output. v cc reset mr wdo v rt mr externally driven low 00088-007 v rt t rs t rs figure 13. reset , mr , and wdo timing watchdog timer (adm705/adm706) the watchdog timer circuit can be used to monitor the activity of the microprocessor to check that it is not stalled in an indefinite loop. an output line on the processor is used to toggle the watch- dog input (wdi) line. if this line is not toggled within the timeout period (1.60 sec), then the watchdog output ( wdo ) goes low. the wdo can be connected to a nonmaskable interrupt (nmi) on the processor; therefore, if the watchdog timer times out, an interrupt is generated. the interrupt service routine should then be used to rectify the problem. if a reset signal is required when a timeout occurs, the wdo should be connected to the manual reset input ( mr ). the watchdog timer is cleared by either a high-to-low or a low- to-high transition on wdi. it is also cleared by reset going low; therefore, the watchdog timeout period begins after reset goes high. when v cc falls below the reset threshold, wdo is forced low whether or not the watchdog timer has timed out. normally, this generates an interrupt, but it is overridden by reset going low. the watchdog monitor can be deactivated by floating the watchdog input (wdi). the wdo can then be used as a low line output, because it goes low only when v cc falls below the reset threshold. t wp wdi wdo reset t rs reset externally triggered by mr t wd t wd t wd 00088-008 figure 14. watchdog timing power-fail comparator the power-fail comparator is an independent comparator that can be used to monitor the input power supply. the comparators inverting input is internally connected to a 1.25 v reference voltage. the noninverting input is available at the pfi input. this input can be used to monitor the input power supply via a resistive divider network. when the voltage on the pfi input drops below 1.25 v, the comparator output ( pfo ) goes low, indicating a power failure. for early warning of power failure, the comparator can be used to monitor the preregulator input simply by choosing an appropriate resistive divider network. the pfo output can be used to interrupt the processor so that a shutdown procedure is implemented before power is lost. input power r1 r2 power-fail input 1.25v pfi pfo power-fail output adm705/adm706/ adm707/adm708 00088-009 figure 15. power-fail comparator
adm705/adm706/adm707/adm708 rev. g | page 9 of 12 adding hysteresis to the power-fail comparator for increased noise immunity, hysteresis can be added to the power-fail comparator. because the comparator circuit is noninverting, hysteresis can be added simply by connecting a resistor between the pfo output and the pfi input, as shown in . figure 16 7v to 15 v input power to microprocessor nmi r3 5v v cc r1 r2 1.25v pfi pfo adp3367 5v 0v 0v v l v in v h ? + 00088-010 pfo adm705/adm706/ adm707/adm708 figure 16. adding hysteresis to the power-fail comparator when pfo is low, resistor r3 sinks current from the summing junction at the pfi pin. when pfo is high, resistor r3 sources current into the pfi summing junction. this results in differing trip levels for the comparator. further noise immunity can be achieved by connecting a capacitor between pfi and gnd. the equations used to calculate the hysteresis are as follows: ? ? ? ? ? ? + = ? ? ? ? ? ? ? ?+= ? ? ? ? ? ? ? ? ? ? ? ? + += r2 r2r1 v r3 v r2 r1 v r1 r3r2 r3r2 v mid cc l h 25.1 25.1 25.1 25.1 125.1 valid reset below 1 v v cc the adm705/adm706/adm707/adm708 are guaranteed to provide a valid reset level with v cc as low as 1 v (see the typical performance characteristics section). as v cc drops below 1 v, the internal transistor does not have sufficient drive to hold the voltage reset at 0 v. a pull-down resistor can be connected externally, as shown in , to hold the line low if required. figure 17 adm705/adm706/ adm707/adm708 gnd reset r1 00088-011 figure 17. reset valid below 1 v
adm705/adm706/adm707/adm708 rev. g | page 10 of 12 applications information a typical application circuit is shown in figure 18. the unregulated dc input supply is monitored using pfi via the resistive divider network. resistor r1 and resistor r2 should be selected so that when the supply voltage drops below the desired level (such as 8 v), the voltage on pfi drops below the 1.25 v threshold, thereby generating an interrupt to the microprocessor. monitoring the preregulator input provides additional time to execute an orderly shutdown procedure before power is lost. 7v to 15v input power microprocessor 5 v v cc r1 r2 1.25v pfi pfo adp3367 ? + 00088-020 reset adm705/adm706/ adm707/adm708 figure 18. typical application circuit microprocessor activity is monitored using wdi. this is driven using an output line from the processor. the software routines should toggle this line at least once every 1.60 seconds. if a problem occurs and this line is not toggled, wdo goes low and a nonmaskable interrupt is generated. this interrupt routine can be used to clear the problem. if, in the event of inactivity on the wdi line, a system reset is required, wdo should be connected to mr , as shown in figure 19. adm705/ adm706 reset gnd i/o line microprocessor mr wdi wdo reset 00088-021 figure 19. reset from wdo monitoring additional supply levels it is possible to use the power-fail comparator to monitor a second supply as shown in figure 20. the two sensing resistors, r1 and r2, are selected so that the voltage on pfi drops below 1.25 v at the minimum acceptable input supply. pfo can be connected to mr so that a reset is generated when the supply drops out of tolerance. in this case, if either supply drops out of tolerance, a reset is generated. adm705/ adm706 reset gnd mr pfi pfo reset v cc r1 r2 v x 5 v 00088-022 microprocessor figure 20. monitoring 5 v and an additional supply, v x microprocessor with bidirectional reset to prevent contention for microprocessors with a bidirectional reset line, a current limiting resistor should be inserted between the adm70x reset output pin and the microprocessor reset pin. this limits the current to a safe level if there are conflicting output reset levels. a suitable resistor value is 4.7 k. if the reset output is required for other uses, it should be buffered, as shown in figure 21. adm70x reset gnd reset gnd buffered reset 5 v v cc 00088-023 microprocessor figure 21. bidirectional input/output reset
adm705/adm706/adm707/adm708 rev. g | page 11 of 12 outline dimensions compliant to jedec standards ms-001-ba 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) seating plane 0.015 (0.38) min 0.210 (5.33) max pin 1 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 8 1 4 5 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.100 (2.54) bsc 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 0.060 (1.52) max 0.430 (10.92) max 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) gauge plane 0.005 (0.13) min controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. corner leads may be configured as whole or half leads. figure 22. 8-lead plastic dual-in-line package [pdip] narrow body (n-8) dimensions shown in inches and (millimeters) compliant to jedec standards mo-187-aa 0.80 0.60 0.40 8 0 4 8 1 5 pin 1 0.65 bsc seating plane 0.38 0.22 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.08 3.20 3.00 2.80 5.15 4.90 4.65 0.15 0.00 0.95 0.85 0.75 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2440) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-aa figure 23. 8-lead standard small outline package [soic_n] (r-8) dimensions shown in millimeters and (inches) figure 24. 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters
adm705/adm706/adm707/adm708 rev. g | page 12 of 12 ordering guide model temperature range package de scription package option branding adm705an ?40c to +85c 8-lead plastic dual-in-line package [pdip] n-8 adm705anz 1 ?40c to +85c 8-lead plastic dual-in-line package [pdip] n-8 adm705ar ?40c to +85c 8-lead standa rd small outline package [soic_n] r-8 adm705arCreel ?40c to +85c 8-lead stan dard small outline package [soic_n] r-8 adm705arCreel7 ?40c to +85c 8-lead stan dard small outline package [soic_n] r-8 adm705arz 1 ?40c to +85c 8-lead standard small outline package [soic_n] r-8 adm705arzCreel 1 ?40c to +85c 8-lead standard small outline package [soic_n] r-8 adm705arzCreel7 1 ?40c to +85c 8-lead standard small outline package [soic_n] r-8 adm706an ?40c to +85c 8-lead plastic dual-in-line package [pdip] n-8 adm706anz 1 ?40c to +85c 8-lead plastic dual-in-line package [pdip] n-8 adm706ar ?40c to +85c 8-lead standa rd small outline package [soic_n] r-8 adm706ar-reel ?40c to +85c 8-lead st andard small outline package [soic_n] r-8 adm706ar-reel7 ?40c to +85c 8-lead st andard small outline package [soic_n] r-8 adm706arz 1 ?40c to +85c 8-lead standard small outline package [soic_n] r-8 adm706arz-reel 1 ?40c to +85c 8-lead standard small outline package [soic_n] r-8 adm706arz-reel7 1 ?40c to +85c 8-lead standard small outline package [soic_n] r-8 adm707an ?40c to +85c 8-lead plastic dual-in-line package [pdip] n-8 adm707anz 1 ?40c to +85c 8-lead plastic dual-in-line package [pdip] n-8 adm707ar ?40c to +85c 8-lead standa rd small outline package [soic_n] r-8 adm707ar-reel ?40c to +85c 8-lead st andard small outline package [soic_n] r-8 adm707arz 1 ?40c to +85c 8-lead standard small outline package [soic_n] r-8 adm707arz-reel 1 ?40c to +85c 8-lead standard small outline package [soic_n] r-8 adm708an ?40c to +85c 8-lead plastic dual-in-line package [pdip] n-8 adm708anz 1 ?40c to +85c 8-lead plastic dual-in-line package [pdip] n-8 adm708ar ?40c to +85c 8-lead standa rd small outline package [soic_n] r-8 adm708ar-reel ?40c to +85c 8-lead st andard small outline package [soic_n] r-8 adm708arz 1 ?40c to +85c 8-lead standard small outline package [soic_n] r-8 adm708arz-reel 1 ?40c to +85c 8-lead standard small outline package [soic_n] r-8 adm708arm ?40c to +85c 8-lead mini small outline package [msop] rm-8 ad70, m8 adm708arm-reel ?40c to +85c 8-lead mini small outline package [msop] rm-8 ad70, m8 adm708armz 1 ?40c to +85c 8-lead mini small outline package [msop] rm-8 m8f adm708armz-reel 1 ?40c to +85c 8-lead mini small outline package [msop] rm-8 m8f 1 z = rohs compliant part. ?2008 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d00088-0-3/08(g)

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